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[Software Engineering] 040402~~

Description: 虽然与SRAM相比，SDRAM需要额外的控制逻辑，有更复杂的时序要求，需要定时刷新，但是由于SDRAM具有单位空间存储容量大和价钱便宜的优点，因而被许多的嵌入式开发者所青睐。为此，针对这种情况，必须设计SDRAM控制器。为了降低系统成本，本课题采用FPGA技术，并使用VHDL语言研究了FPGA与SDRAM的存储器接口实现问题。-Abstract In order to expand the SDRAM’S storage capacity of the TS一101 processor，a method is pro— posed for implementing the SDRAM controller based on FPGA．The characteristics of the corresponding SDRAM are analyzed and the schematic diagrams and the timing are given．The function of modules and per- formance of SDRAM storage board are described．The design method of modularization is adopted in FPGA． This design expands the SDRAM’S storage capacity of the TS-101 processor to 512Mbytes．
Platform: | Size: 254976 | Author: zhangying | Hits:

[VHDL-FPGA-Verilog] sdram_controller

Description: sdram controller written in vhdl and tested
Platform: | Size: 36864 | Author: Shahzad | Hits:

[VHDL-FPGA-Verilog] DDRSDRAM

Description: 用vdhl编写的DDR sdram控制器，采用模块化编写，条理清楚，注解详细，附有存储器的说明。-the ddr sdram controller base vhdl
Platform: | Size: 476160 | Author: tangjieling | Hits:

[VHDL-FPGA-Verilog] sdramc_vhdl

Description: Xilinx提供的SDRAM控制器参考设计（VHDL)-SDRAM controller reference design (VHDL) designed by Xilinx
Platform: | Size: 1230848 | Author: charlie | Hits:

[VHDL-FPGA-Verilog] SDRAMcontrol

Description: 用VHDL编写的SDRAM控制器，能实现SDRAM的读写控制及片选。-Prepared using VHDL SDRAM controller, able to SDRAM read and write control and chip select.
Platform: | Size: 1031168 | Author: 曾强 | Hits:

[VHDL-FPGA-Verilog] sram

Description: sram操作vhdl源程序，内有sdram模型，控制器设计，及测试源程序-sram operating in vhdl \doc DDR SDRAM reference design documentation \model Contains the vhdl SDRAM model \route Contains the Quartus 2000.05 project files a routed controller design \simulation Contains the vhdl testbench, modelsim project file, and library \source Contains the vhdl source files for the DDR SDRAM reference design \synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
Platform: | Size: 897024 | Author: chen | Hits:

[VHDL-FPGA-Verilog] SDRAM_control_design

Description: 一个SDRAM控制器的参考设计vhdl语言，包含了全部逻辑功能代码以及约束文件，包括一些综合布线后的文件和波形，有较高的参考价值。-A SDRAM controller reference design vhdl language contains all logic code as well as the constraints file, including files and waveform integrated wiring, there is a high reference value.
Platform: | Size: 2592768 | Author: wang fangwen | Hits:

[Software Engineering] DDRSDRAM

Description: 基于VHDL的DDR SDRAM控制器的设计，实现数据的读写功能，迸发长度分为2，4，8-Based on the VHDL DDR SDRAM controller design, implementation of data read and write capabilities, burst into the length of 2, 4, 8
Platform: | Size: 823296 | Author: zhangjiefei | Hits:

[VHDL-FPGA-Verilog] fifo1k_32

Description: vhdljichu,完成vhdl中对sdram控制器的功能-vhdljichu, completed in vhdl sdram controller functions for
Platform: | Size: 2048 | Author: mu | Hits:

[VHDL-FPGA-Verilog] 61EDA_C915

Description: altera公司的SDRAM 控制器的ip core源代码 里面包含verilog及vhdl两种语言编写的 方便选择-altera company SDRAM controller ip core source code which contains verilog and vhdl two kinds of language for easy selection
Platform: | Size: 2325504 | Author: 杜小方 | Hits:

[Other] SDRAM_Modelsim

Description: 基于VHDL的SDRAM控制器源代码以及modesim验证工程的testbench-SDRAM controller based on VHDL source code and modesim verification testbench works
Platform: | Size: 2521088 | Author: 刘淇 | Hits:
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